STATIC MEMORIES AND METHODS OF READING STATIC MEMORIES

摘要

The bit lines (BL, BL) of a static memory (110A) are biased dynamically at the power supply voltage VCC or at least closer to VCC than the mid-point between VCC and the reference voltage VSS. Such biasing provides a better read-disturb immunity, higher speed, and reduced power consumption. Such biasing allows to obtain fast a high differential voltage on the bit lines (BL, BL) during a read and thus allows, in some embodiments, to eliminate a pre-amplifier amplifying the bit line (BL, BL) differential voltage.