发明名称 DIGITAL VIDEO SIGNAL PROCESSOR
摘要 <p>PURPOSE:To facilitate error correction in a video signal and error adjustment by preparing a field memory and a sub memory at a vertical part and storing data for error correction in the sub memory. CONSTITUTION:A judgement signal CRCTV and a vertical error flag SFLG are supplied to an error correction circuit 40 of a vertical part 28. A field memory 34 and a sub memory 35 are provided, and the data for error correction are stored in the memory 35. When a signal is '0' and a flag is '1', the correction of a sub block is disabled and a sub block is made erroneous. Therefore, for the sub block to appear in a data sequence DTF from the memory 34, the error is corrected by data contained in a line spatially lower than the field by one line. When the signal and the flag are '1', the sub block enables the correction and the error is corrected. Thus, the error correction and adjustment in the video signal can be easily executed.</p>
申请公布号 JPH04356884(A) 申请公布日期 1992.12.10
申请号 JP19910186661 申请日期 1991.07.25
申请人 SONY CORP 发明人 YAMAMOTO YOSHIKAZU;YOSHIMOTO KAZUO
分类号 H04N5/92;G11B5/09;H04L1/00;H04N5/93;H04N5/937;H04N7/24;H04N19/00;H04N19/42;H04N19/423;H04N19/426;H04N19/46;H04N19/59;H04N19/65;H04N19/70;H04N19/85;H04N19/895 主分类号 H04N5/92
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