发明名称 |
SCHALTUNGSANORDNUNG ZUM SCHUTZ GEGEN UEBERSPANNUNGEN AN EINGAENGEN INTEGRIERTER MOS-SCHALTKREISE |
摘要 |
In a circuit, thick oxide-layer transistors (1) link input connections (PAD) to a reference potential (VSS), additional thick oxide-layer transistors (3) link the input connections (PAD) to a supply voltage (VDD) and thin oxide-layer transistors (2) lik the inputs (IN) of an integrated MOS circuit to the reference potential (VSS), all links between the input connections (PAD) and the inputs (IN) of the integrated MOS circuit being provided each with at least one protective resistance (R). Also disclosed is a circuit, in which additional thin oxide-layer transistors (4) are arranged between the inputs of the integrated MOS circuit and the supply voltage (VDD) and/or the links between the input connection (PAD) and the inputs (IN) of the integrated MOS circuit are formed by a serial connection between a protective resistance (R) and a coupling MOS transistor (5).
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申请公布号 |
DE4118441(A1) |
申请公布日期 |
1992.12.10 |
申请号 |
DE19914118441 |
申请日期 |
1991.06.05 |
申请人 |
SIEMENS AG, 8000 MUENCHEN, DE |
发明人 |
TERLETZKI, HARTMUD, DIPL.-ING. (TU), 8012 OTTOBRUNN, DE |
分类号 |
H03K19/003 |
主分类号 |
H03K19/003 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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