| 摘要 |
<p>A method for fabricating a dynamic random access memory comprises the steps of determining a design rule for word lines (WL, 16) and bit lines (BL, 20) and further for a pattern (AL, 30) that extends from a memory cell array region to a peripheral region across a stepped boundary, determining a step height (H) of the stepped boundary based upon the design rule, determining a capacitance (CS) of the memory cell capacitor based upon the step height of the stepped boundary, determining a parasitic capacitance (CB) of a bit line such that a ratio of the parasitic capacitance to the capacitance of the memory cell is smaller than a predetermined factor, and determining the number (N) of the memory cells that are connected to one bit line based upon the parasitic capacitance of the bit line. <IMAGE></p> |
