| 摘要 |
<p>A BiCMOS driver circuit with an improved low output level which is closer to ground than in prior art circuits, both at full speed and with a static (resistive) load. The driver circuit incorporates a gated diode pull-down with a lower voltage drop than in prior art driver circuits, in which a bipolar output transistor remains on for output voltages down to about 0.3V. The voltage drop of the gated diode is set by device size ratios to be less than 0.5V without driving the output transistor into hard saturation. In the circuit, a gated diode pull-down NPN transistor (QNPN2) is coupled between an output terminal (OUT) and ground. A first CMOS transistor pair (QN3A, QN4A) is coupled between the output terminal (OUT) and the base of the pull-down NPN transistor (QNPN2), and a second CMOS transistor (QN3B, QN4B) pair is coupled between the base of the pull-down NPN transistor (QNPN2) and the power supply VDD. The circuit has improved low output level and high-to-low transitions. The circuit has particular applications to many types of logic gates, for example in NAND gates, NOR gates, and inverters, as are used extensively in static or dynamic random access memory logic circuits. Although the disclosed embodiments herein are for NAND gates, one skilled in the art could readily implement the teachings of the present invention in other logic circuits and gates, such as NOR gates and inverters with minor changes in the circuitry. <IMAGE></p> |
