| 摘要 |
A memory device having an array of memory cells each including a trench capacitor and a pass transistor. The transistor has its source connected to the storage capacitor, its drain connected to a bit line, and its gate connected to a word line. The bit line is formed over a field oxide layer formed on the semiconductor substrate so there is minimal contact between the bit line and the semiconductor substrate. The storage dielectric in the trench is recessed from the surface of the semiconductor substrate.
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