发明名称 FAULT DECIDING CIRCUIT FOR UNIDIRECTIONAL COMMUNICATION RECEIVER
摘要 PURPOSE:To simply and easily attain self-decision by generating a test signal of a same frequency so as to detect a fault at the reduction in a reception signal. CONSTITUTION:A reception signal from an antenna 4 is inputted to a synthesis circuit 11. When a warning device 10 raises an alarm attended with a preset fault such as a reduction of a reception output signal or the like, the maintenance personnel operates a test wave generating circuit 12 by switch operation and a same test signal of a frequency as that of the reception frequency is inputted to the synthesis circuit 11. When the reception signal obtained by a demodulator 9 is normal in this state, since the circuits after the synthesis circuit 1 are decided normal. Then the transmitter and the transmission system are checked.
申请公布号 JPH04354434(A) 申请公布日期 1992.12.08
申请号 JP19910129554 申请日期 1991.05.31
申请人 FUJITSU LTD 发明人 ENDO HIROYUKI
分类号 H04B1/06;H04B17/00 主分类号 H04B1/06
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