| 摘要 |
A neurocomputer connected to a host computer, the neurocomputer having a plurality of processor elements, each of the processor elements being placed at each of node of a lattice respectively, the neurocomputer includes a plurality of first processor elements, each of the first processor elements being placed at a node of the lattice, capable of transmitting data from and to the host computer and capable of transmitting the data to one of adjacent processor elements, a plurality of second processor elements, each of the second processor elements being placed at a node of the lattice, capable of receiving the data from one of adjacent processor elements, and capable of sending the data to another adjacent processor elements from which the data is not outputted. The neurocomputer also includes a plurality of rectangular regions, each of the rectangular regions including a plurality of the processor elements, a plurality of physical processors, each of the processors being placed in each of the rectangular regions and connected with adjacent processors each other, each of the processors being capable of inputting and outputting to and from the host computer and having all functions of the processor elements included in the rectangular region, and a device for distributing the physical processors to one or a plurality of divided sections formed in the rectangular regions in such a manner that each of the sections is substantially equally assigned to each of the physical processors by permutation.
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