发明名称 IMAGE INTERPOLATION CIRCUIT
摘要 <p>PURPOSE:To obtain versatility and to enable high speed operation at low cost by arranging plural integration circuits and obtaining the interpolation value between the respective picture elements of a block consisting of 2nX2m dots. CONSTITUTION:A picture element interpolation circuit 30 is an image interpolation circuit calculating the interpolation value between the respective picture elements of the picture element of a block consisting of plural dots of picture element, and four memories 40 to 43 storing one dot of picture element data as a storage means storing 2X2 dots of picture element data, calculators 44 to 47 which are the interpolation calculation means calculating the interpolation value based on the 2X2 dots of respective picture element data and a control part 36 controlling an input/output are provided within one integration circuit 31. The interpolation value between the respective picture elements of the block consisting of 2nX2m dots of picture elements can be obtained by arranging plural integration circuits 31 (311,312,...).</p>
申请公布号 JPH04354287(A) 申请公布日期 1992.12.08
申请号 JP19910155749 申请日期 1991.05.30
申请人 SONY CORP 发明人 FUJIMOTO TADAO
分类号 G06F17/17;G06T9/00;H03H17/06;H04N5/14;H04N5/85;H04N5/926;H04N5/937;H04N19/00;H04N19/42;H04N19/423;H04N19/436;H04N19/51;H04N19/59 主分类号 G06F17/17
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