| 摘要 |
PURPOSE:To perform a write operation and an erase operation in each memory and to eliminate a need for a transistor for selection use by a method wherein a well is separated in such a way that memory transistors are arranged in a row and a memory cell can be selected from a matrix composed of wining for gates and of wells. CONSTITUTION:For example, when a write operation is executed to a memory cell 5, a ground potential is given to a well W2 and a programming voltage VPP is applied to gate control wining Y2. A high electric field is generated between a gate electrode for a memory transistor T22 in the memory cell 5 and the well W2; a write state to the memory cell 5 is realized. On the other hand, a maximum voltage VWP within a range not causing a write operation is applied, via gate control wining Y1, to a gate electrode for a memory cell 8 which shares the selected memory cell 5 and the well W2. As a result, a storage state is not caused. When the gate control wining and the voltages for wells are selected in this manner, the selection and the nonselection of the memory cell can completely be performed. |
