| 摘要 |
PURPOSE:To obtain a phase locked loop(PLL) circuit offering high speed lock and high accuracy. CONSTITUTION:A voltage controlled oscillator 4a(4b) with a small loop gain is selected till the synchronization of the phase locked loop circuit composed of a phase comparator 1, a filter 2, plural voltage controlled oscillators 4a, 4b with a different loop gain, a 1/N frequency divider 6, and a reference signal oscillator 7 for the phase comparator 1, etc., and the voltage controlled oscillator 4b(4a) having a larger loop gain is selected after the lapse of a prescribed time. Thus, the high speed lock and high accuracy of the circuit are attained. |
