| 摘要 |
PURPOSE:To increase the capacity of a capacitor, to enhance a soft error- resistant property and to integrate the title device highly by a method wherein the capacity part of the capacitor is formed of polycrystalline silicon, a dielectric film and a conductor film three-dimensionally on an insulating film on a semiconductor substrate and the height of the polycrystalline silicon is made high. CONSTITUTION:A capacitor is formed of a second polycrystalline silicon layer 109, a dielectric film 110 and a barrier metal layer 113 on a mask oxide film 105. As a result, the plane projection area of a capacitor part is small, but the capacity of the capacitor is large. Thereby, the soft error-resistant property of a memory cell can be enhanced. The second polycrystalline silicon layer 109 is formed so as to surround three sides of a platinum silicide layer 112. When the barrier metal layer 113 is applied to the upper part of the second polycrystalline silicon layer 109 in order to form the capacitor, the conductor film of the capacitor can be applied inevitably to a Schottky barrier diode. As a result, the margin of the alignment accuracy of an interconnection can be obtained. |
