发明名称 PULSE GENERATING CIRCUIT
摘要 PURPOSE:To control and adjust a time zone when an output pulse signal is active and a time zone when an output pulse signal is inactive corresponding to fluctuation of a power supply voltage in the pulse generating circuit from which a polyphase pulse signal is generated. CONSTITUTION:A level fluctuation of a power supply voltage is detected by a power supply voltage detection circuit 13 and inputted to a gate of an N- channel MOSFET 7. A P-channel MOSFET 4 and an N-channel MOSFET 5 are used for components of an inverter or the P-channel MOSFET 4 and the N-channel MOSFETs 5, 6, 7 are used for components of the inverter are decided depending on the state of on/off of the N-channel MOSFET 7. Thus, the path of an input signal phi is selected to any of the component paths for determining the delay characteristic of the semiconductor circuit components with respect to the input signal phi depending on high or low power supply voltage. The high level state of an output signal phiB shares much in the time zone when the power supply voltage is lowered, and the time zone when both output signals phiA and phiB are at a low level is longer when the power supply voltage gets higher.
申请公布号 JPH04348611(A) 申请公布日期 1992.12.03
申请号 JP19910120617 申请日期 1991.05.27
申请人 NEC KYUSHU LTD 发明人 FUJITO KAZUMI
分类号 H03K5/151;G06F1/06;H03K5/15 主分类号 H03K5/151
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