| 摘要 |
PURPOSE:To increase the integration density of a memory so as to be an open- bit constitution while an advantage that the operating margin of a folded bit-line constitution is large is being kept by a method wherein first memory cell arrays and second memory cell arrays are formed alternately on a semiconductor substrate. CONSTITUTION:An n-channel MOS transistor is formed of word lines WL1, WL2, WL3, WL4 and diffusion layers 7, 8. Memory cells are constituted of capacitors. First memory cell arrays are formed in an array in the direction of bit lines. On the other hand, p-channel MOS transistors formed of diffusion layers 9, 10 and second memory cell arrays constituted of capacitors are formed alternately. Both the first and second memory cell arrays do not generate a nonselective word-line region, and the memory cells can be laid out at smallest intervals and most densely. The integration density of the memory cells can be increased so as to be an open bit-line constitution, and the memory cell are laid out as a folded bit-line constitution. As a result, an operating margin can be increased. |
