发明名称 BUS PARITY ERROR OCCURRENCE POSITION DETECTION SYSTEM FOR INPUT/OUTPUT CONTROLLER
摘要 PURPOSE:To specify in which local bus a parity error occurs when the bus parity error occurs in bus constitution having plural local buses. CONSTITUTION:Parity C/G control parts 4-1 to 4-3 are provided for respective local buses. When the parity error is detected, a BERR line 102 is made active for CPU 1. When the BERR line 102 becomes active, CPU 1 outputs addresses which are previously allocated to respective local buses are outputted to an AM line 101 and detects the signal state change of the BERR line 102. When the C/G control parts 4-1 to 4-3 of the respective local buses detect that the address to oneself is outputted to the AM line 102, the BEER line 102 is negated.
申请公布号 JPH04347752(A) 申请公布日期 1992.12.02
申请号 JP19910120727 申请日期 1991.05.27
申请人 NEC CORP 发明人 KAWAMURA TOSHIKI
分类号 G06F11/10;G06F11/22;G06F13/00 主分类号 G06F11/10
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