| 摘要 |
Apparatus for correcting the byte alignment of multiple-byte data words during DMA word transfers. The apparatus includes a four-byte input word bus and a four-byte output word bus. A carrier register stores the second, third and fourth bytes of a first four-byte data word received on the input bus. A data selector including four 4:1 multiplexers determines which of the three stored word bytes and which of four bytes corresponding to a second data word received on the input bus should be placed on the four-byte output word bus and the sequential order of the bytes on the bus.
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