METHOD AND CIRCUIT ARRANGEMENT FOR CONTROLLING A SERIAL INTERFACE CIRCUIT

摘要

A method and circuit for reducing the load of the microprocessor unit of a microprocessor controlled, serial interface circuit. The transmission side of the interface circuit has a first auxiliary stage that, dependent on the presetting by the microprocessor unit generates a control bit stream and transmits a data bit stream from a serial bit stream converter stage. A self-generated data bit stream generates prompter signals for the microprocessor unit and the reception side of the interface circuit has a second auxiliary stage that recognizes message changes over a predetermined time period and generates a prompter signal when the message change occurs.