| 摘要 |
PURPOSE:To obtain a digital modulation signal demodulating circuit suited to an IC. CONSTITUTION:After a received signal is converted into a digital signal by an analog/digital converting circuit 11, it is supplied to a first storage device 14 and a second storage device 15 as a high-order address. On the other hand, a counted valve output from a carrier phase counter 12 which counts a clock signal having a frequency higher than that of a carrier signal is supplied as a low-order address directly to the first storage device 14, and to the second storage device after shifting a phase only by pi/2 by a phase shifting circuit 13. Then, the multiplied data of the received signal by the carrier signal corresponding to the designated address are obtained by each storage device, and the demodulated signals of I and Q phases are obtained. |
