| 摘要 |
PURPOSE:To surely detect a header and to prevent it from being misdiscriminated as the end of data transfer when the header cannot be once detected due to any fault in the header detection circuit detecting the header added to the head of the data inputted in the unit of frames. CONSTITUTION:Upon the detection of a header pattern in a data D1, a comparison section 1 outputs a pulse P1 and 1-frame delay sections 3,4 output pulses P2, P3 resulting from delaying the pulse P1 by 1 frame and 2 frames respectively. AND gates 7-9 and an OR gate 10 output a pulse P4 by receiving at least two of the pulses P1-P3 simultaneously. A header number counter 5 counts the pulse P4 and outputs a processing start pulse P6 when the count reaches a prescribed value or over. The frame counter 6 outputs a processing stop pulse P5 when the counter 6 loses the application of the pulse P4 for one frame or over. |
