发明名称 CLOCK EXTRACTION CIRCUIT
摘要 <p>PURPOSE:To extract a basic frequency component at all times stably by extracting 1st and 2nd basic frequency components of a clock signal from a direct output of a demodulated base band signals and a multiplication output of the signals respectively and selecting a 2nd extraction component at a prescribed condition. CONSTITUTION:A multiplication output of demodulation base band signals 1 by a multiplier 2 is processed by a BPF 3, from which a basic frequency component of a 1st clock signal is extracted. On the other hand, the signal 1 is processed by a BPF 5 or the like, from which a basic frequency component of a 2nd clock signal is extracted. When a level of the 2nd basic frequency component is in excess of a threshold level set to a comparator 6, the 2nd basic frequency component is outputted while being selected by an output changeover device 8 and a timing recovery clock is not lost even at the transmission of 0,1 alternate codes and the basic frequency component is always extracted stably.</p>
申请公布号 JPH04345246(A) 申请公布日期 1992.12.01
申请号 JP19910146783 申请日期 1991.05.22
申请人 HITACHI DENSHI LTD 发明人 ADACHI MASARU
分类号 H04L7/00;H04L27/14 主分类号 H04L7/00
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