| 摘要 |
1. Circuit for a control and memory system with a comprehensive system of protection against internal and external damage, in particular in telecommunications, characterized in that it consists of a processor (PR), memory blocks (PB) and separating circuits (US) which separate the internal buses (SZ) of the control system with the memory blocks (BP) from the final control circuits (UW), and also of information protection circuits (ZI) in semiconductor-based RAM and of circuits serving to monitor correct functioning (UK) of the control and memory system, and of circuits (SP) controlling relays (P) of the power supply to the final control circuits (UW) and emergency connectivity, where the separating circuits (US) are located between the buses (SZ) of the control system with memory and the final control circuits (UW), the inputs of the operation monitoring circuits (UK) are connected to the buses (SZ) of the control system with memory and to the outputs of the separating circuits, and the outputs of the operation monitoring circuits (UK) are connected to the processor (PR) and the inputs of the circuits (SP) controlling the relays (P) of power supply to the final control circuits (UW) and emergency connectivity.<IMAGE>
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