| 摘要 |
<p>PURPOSE: To speedily select an optimum merge bit by storing the number of zero etc. at the top end and rear end of channel bit data, to which the merge bits are added, in a memory, successively calling the information in the memory and comparing it. CONSTITUTION: A code memory 30 generates a channel bit CB of 14 bits corresponding to the symbol data of 8 bits and an except signal EX. While defining the symbol data of 8 bits as a 1st address and a merge select signal MS as a 2nd address, a CSV memory 40 successively generates a lead zero LZ, end zero EZ, CSV and invertion presence/absence signal INV and outputs a merge bit MB. A merge bit generating part 100 checks the run length of the merge bit and channel bit according to the lead zero LZ, end zero EZ, CSV, invertion presence/absence signal INV and except signal EX and simultaneously calculates a code sum value DSV and when the optimum merge bit is selected, the merge select signal MS is generated as the final 2nd address of the CVS memory 40.</p> |
