HARDWARE MODELER WITH SIMULTANEOUS MODEL EXECUTION, SHARED MEMORY AND MULTIPLE HEIGHT CARTRIDGE CAPABILITY

摘要

An improved high speed hardware modeler for use in circuit simulation including fault simulation includes a plurality of pin memory controllers coupled to separate cartridge buses to effect simultaneous hardware model evaluation. By providing multiple data paths from pin memory to multiple cartridge buses, memory sharing between pin memory controllers can be effected. In addition, multiple pin memory controllers can be linked and synchronized to drive cartridges which span two or more pin memory controllers to accommodate hardware devices with more pins than can be handled by a single pin memory controller. The cartridges include a ROM containing configuration information for programming the cartridge to communicate with various types of DUS. The programming is done by the system upon plugging the cartridge into the hardware modeler.