| 摘要 |
<p>PURPOSE:To prevent the mistake of erasing a memory for a non-selective memory cell when the selective erasure for a memory is operated. CONSTITUTION:When a control operation is executed for a memory selective erasure, each word line WL1, WL2,...WLm arranged among the lines of MIS nonvolatile memory transistors M11, M12,... M1n,...Mmn and a memory array substrate SUB are short-circuited by turning-on short-circuiting MOS transistors P1, P2,...Pn. The memory array substrate SUB and a substrate driver SBD are separated by turning-off a separation MOS transistor Q. Thus, the noise of a word line generated accompanying the potential transfer of the bit lines BL1, BL2...BLn and the noise of the memory array substrate are made equal.</p> |
