| 摘要 |
A digital signal detecting apparatus for reproducing high-density digital signals which are recorded on recording media in systems for processing digital signals such as digital VTR's, comprises a rectifier for rectifying a negative voltage of the signal reproduced through a recording head, a reproducing amplifier and an equalizer into a positive voltage; a comparator for generating a rectangular waveform by comparing the output signal of the rectifier with a reference signal; a frequency multiplier for multiplying the reproduced signal which is inputted as a level-controlled state by a PLL (Phase Locked Loop) for outputting the synchronized clock signal by comparing the phase of the signal outputted from the frequency multiplier with the phase of the frequency-divided signal thereof; and a data detector for detecting the original digital data signal from the signal outputted from the comparator by utilizing the clock signal fed from the PLL, for outputting NRZ (Non-Return to Zero) digital data signal to be demodulated in the demodulator.
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