发明名称 OVERFLOW DETECTING SYSTEM FOR PRODUCT SUM CIRCUIT
摘要 PURPOSE:To realize the overflow detecting system which can detect overflow at high speed by executing the calculation of a product sum circuit at high speed. CONSTITUTION:At the product sum circuit composed of a register 11 to substitute a multiplicand A, register 12 to substitute a multiplier B, parallel multiplier 20 to execute parallel multiplication between the multiplicand A and the multiplier B, register 30 to substitute the output of the parallel multiplier 20, adder 40 to add the contents of the register 30, clip circuit 50 to clip the output of the adder 40 to a maximum value when the added result overflows and accumulator 60 to substitute the added result of the adder 40, an overflow detecting means 70 is provided to detect the overflow of the accumulator 60 and when it is detected that the accumulator 60 is just before the overflow during the addition at the adder 40 and a signal from a low-order digit is in an overflow direction, the overflow is judged.
申请公布号 JPH04333924(A) 申请公布日期 1992.11.20
申请号 JP19910105299 申请日期 1991.05.10
申请人 FUJITSU LTD 发明人 KOBAYASHI NOBORU
分类号 G06F7/38;G06F7/506;G06F7/53;G06F17/10 主分类号 G06F7/38
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