发明名称 CLOCK MONITORING SYSTEM
摘要 <p>PURPOSE:To detect a noise included in a clock of a TTL level by providing this clock monitoring system with a comparing part and a noise detection part and detecting a positive polarity noise included in an 'L' level area of an input clock. CONSTITUTION:The comparing part 100 compares the voltage of an input clock with a reference voltage Vref1. The comparing part 100 outputs the input clock a prescribed signal in accordance with the input clock or a compared result that the voltage of a positive or negative polarity noise included in the 'L' level area of the input clock is larger or smaller than the reference voltage Vref1. At the time of inputting the output of the comparing part 100, the noise detection part 300 outputs a signal indicating the detection of noise only when the voltage of the positive polarity noise is larger than the reference voltage Vref1. Thus the positive polarity noise included in the 'L' level area of the input clock can be detected. In the case of using the clock monitoring system for a device processing a synchronizing signal or the like, a noise included in a TTL level clock can be detected without observing its waveform and a circuit can be miniaturized.</p>
申请公布号 JPH04332011(A) 申请公布日期 1992.11.19
申请号 JP19910101704 申请日期 1991.05.08
申请人 FUJITSU LTD 发明人 SHIRAI MASAHIRO;SUZUKI NORIYUKI;MIYAWAKI HIROTOMO;YOGOSHI NORIYUKI;SAGAWA SHIGEATSU
分类号 G06F1/04;H04L7/00;H04L25/02 主分类号 G06F1/04
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