发明名称 |
Superconducting gate array cells |
摘要 |
Superconducting timed gate array cells for use in single-rail logic circuits are provided by adding inputs to modified variable threshold logic (MVTL) timed inverter circuits. Data signals which are inphase with a first phase of a power source are coupled to gate array cells in which Josephson junction bias current is provided by a second phase of the power source. NOR, NAND, 2NOR-OR and 2NAND-AND circuits are disclosed for use as building blocks in the production of specialized digital logic circuits.
|
申请公布号 |
US5164618(A) |
申请公布日期 |
1992.11.17 |
申请号 |
US19910744732 |
申请日期 |
1991.08.14 |
申请人 |
WESTINGHOUSE ELECTRIC CORP. |
发明人 |
MURPHY, JOHN H.;DANIEL, MICHAEL R.;PRZYBYSZ, JOHN X. |
分类号 |
H03K19/195 |
主分类号 |
H03K19/195 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|