发明名称 METHOD AND APPARATUS FOR ANALYZING ERRORS IN INTEGRATED CIRCUITS
摘要 Method and apparatus for analyzing errors or failures in integrated circuits wherein the integrated circuit is displayed on the picture screen of a work station (AS) and the circuit is excited with a test signal such that at least one measuring location is selected on a malfunction path and an actual signal tappable at this measuring location is compared to a rated signal and wherein the fault location is identified from the comparison results at the measuring locations. The object is to execute a method using an electron beam testing apparatus (EMG) such that the simplest possible measured data transfer occurs. For this purpose the selection of the measuring location on the malfunctioning path proceeds such that a portion (23) of the layout of the integrated circuit corresponding to the measuring location is displayed on the picture screen of the work station and the measuring location is marked by a cursor (24) and position signals depending on the positon of the cursor (24) are supplied to the electron beam measuring apparatus for aligning the electron beam (2) to the measuring location and such that the electron beam testing apparatus is utilized for the identification of the actual signal.
申请公布号 US5164666(A) 申请公布日期 1992.11.17
申请号 US19850753555 申请日期 1985.07.10
申请人 ICT INTEGRATED CIRCUIT TESTING GESELLSCHAFT FUER HALBELEITERPRUEFTECHNIK MBH 发明人 WOLFGANG, ECKHARD;ZIBERT, KLAUS
分类号 H01J37/28;G01N23/225;G01R31/02;G01R31/26;G01R31/302;G01R31/305;H01L21/66 主分类号 H01J37/28
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