发明名称 High density integrated MOS circuit with reduced narrow channel effect - uses vertical channel structure with epitaxial silicon or pattern etched into the substrate with circular or elliptical walls
摘要 Basic MOS transistor has the basic constituents of parallel source (40) and drain (39) edges between which a channel (32) with overlapping gate electrode (36) has been formed. The channel edges are not straight, and the effective channel width is defined by the non-linearity. The drain/source boundaries of the channel region are curved or folded parallel to the surface of the channel region. The gate electrode surface in contact with the gate dielectric consists of planes at an angle to each other. The construction also has an opening (32) with curved sidewalls on part of which the gate dielectric (35) and -electrode (36) have been formed adjacent to the drain (40) and source (39) regions formed respectively in the bottom surface of the hole (32) and in the surface of the upper single crystalline Si layer (31,33). The hole shape (32) can be circular or elliptical, in the last case the gate electrode is formed in the area of highest curvature.
申请公布号 DE4215010(A1) 申请公布日期 1992.11.12
申请号 DE19924215010 申请日期 1992.05.06
申请人 MITSUBISHI DENKI K.K., TOKIO/TOKYO, JP 发明人 MORIHARA, TOSHINORI, ITAMI, HYOGO, JP
分类号 H01L21/336;H01L27/108;H01L29/10;H01L29/423 主分类号 H01L21/336
代理机构 代理人
主权项
地址