发明名称 Active pull-down circuit.
摘要 <p>A reference voltage generating circuit which comprises transistor Q2 and resistors R2 and R3 and transistor Q1 are formed integrally in a current mirror circuits, and the collector potential of transistor Q2 is used as the reference voltage. Thus, the present invention provides an active pull-down circuit capable of stabiliszing a steady state current which passes through the transistor (Q1) for pull-down operation and reducing variations of the delay time. &lt;IMAGE&gt;</p>
申请公布号 EP0512850(A1) 申请公布日期 1992.11.11
申请号 EP19920304156 申请日期 1992.05.08
申请人 NEC CORPORATION 发明人 MATUMOTO, KOUJI NEC CORP.
分类号 H03K19/013;H03K19/086 主分类号 H03K19/013
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