| 摘要 |
PURPOSE:To increase the withstand voltage of a field effect semiconductor device by surrounding one FET with a high impurity density guard ring region when forming a complementary IGFET and isolating the end of a gate electrode from a drain region. CONSTITUTION:An SiO2 film 31 is covered on an N type Si substrate 30, a predetermined window is opened thereat, impurity ions are implanted, and P type well regions 32 and 33 of N-channel and P-channel transistors are formed. Subsequently, a heat treatment is conducted, these regions are elongated, diffused, and deepened as regions 34 and 35, the film 31 is converted into a film 46, a window is opened thereat, an N<+> type source and drain regions 36 and 37 are diffused within the region 34, and an N<+> type guard ring 38 is diffused to surround the region 35. Thereafter, a P<+> type drain region 40 is formed within the region 35, a P<+> type source region 39 is formed within the region 38 in the vicinity of the region 35, the end of the gate insulating film 41 for the P-channel element is not overlapped with the region 40 but is covered thereon, and a gate electrode is formed thereon. |
