Process for manufacturing dynamic random access memories.

摘要

A process for creating multi-megabit DRAM memories using dielectric filler strips (51) between wordline gaps. In buried contact regions, the filler strips are disposable, while in other regions, the filler strips are left in place so as to reduce bit line capacitance. The process comprises the following sequence of steps, which commence following an anisotropic etch of a first layer of type-1 insulative material (e.g. silicon dioxide), which creates wordline sidewall spacers: CVD deposition of a gap-filling layer of a type-2 insulative material (e.g. silicon nitride) (31) having a high rate of etch selectively with respect to type-1 insulative material to a thickness sufficient to completely fill the gaps between wordlines; planarization of the gap-filling layer; removal of gap-filling insulative material in wordline gaps where bitline contact will be made; anisotropic removal of type-1 insulative material (28) at the base of the bitline contact vias formed in the previous step; CVD deposition of a bitline polysilicon layer (71) of sufficient thickness to completely fill the bitline contact vias; silicidation (72) of the bitline polysilicon layer; deposition of a second layer of type-1 insulative material (73); patterning of the type-1 insulative-material-coated, silicided bitline polysilicon layer to form bitlines; blanket deposition of a third type-1 insulative layer; anisotropic etching of the third type-1 insulative layer (91) in order to form bitline sidewall spacers; removal of gap-filling insulative material in storage-node plate contact regions; deposition of a storage-node polysilicon layer (121); and patterning of the storage-node poly layer.