发明名称 Quadrature bus protocol for carrying out transactions in a computer system.
摘要 <p>A protocol for carrying out transactions in a multiple-processor computer system comprises: dividing the transaction cycle into four quadrature states, an arbitrate state, an I/O state, a slave address state and a virtual memory state. The protocol enables the processors to determine before arbitrating whether the memory device is busy, which reduces the number of "busied" transactions. &lt;IMAGE&gt;</p>
申请公布号 EP0512685(A1) 申请公布日期 1992.11.11
申请号 EP19920303034 申请日期 1992.04.06
申请人 HEWLETT-PACKARD COMPANY 发明人 BROCKMANN, RUSSELL C.;JOHNSON, LEITH L.;JAFFE, WILLIAM S.
分类号 G06F13/36;G06F12/08;G06F13/368;G06F15/17 主分类号 G06F13/36
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