COMBINED CIRCUIT OF SENSE AMPLIFIER AND LATCHING CIRCUIT

摘要

PURPOSE: To require only one gating signal at the time of an operation and to provide an important growing ability and porosity performance. CONSTITUTION: A first stage contains a master latch(ML) and a second stage a slave latch. They are detached by a third control device (TG5). The free end of the PFET device of the master latch is connected to first supply voltage (Vdd), and the free end of an NEFT device is point-connected for forming a common node (K). A reference generator 23 connects the common node (K) to second supply voltage (GND) or reference voltage (VREF). A control device and a VREF generator are driven by a single setting sense amplifier signal(SSA). During an operation, both stages are alternately selected by the SSA signal and the prescribed stage holds previous data while the different stage operates.