发明名称 CLAMP FOR VIDEO SIGNAL PROCESSING CIRCUIT
摘要 A video signal processing circuit utilizes an analog-to-digital converter to output a digital signal derived from a demodulated video signal which is supplied from a video signal demodulating circuit. The circuit can compensate the demodulated video signal by utilizing the conversion characteristics of an analog-to-digital converter, to compensate the level differences or linearity differences between the video signal reproducing channels in a video tape recorder employing multi-channel recording.
申请公布号 US5162921(A) 申请公布日期 1992.11.10
申请号 US19900492808 申请日期 1990.03.13
申请人 SONY CORPORATION 发明人 KANEKO, SHINJI
分类号 H04N5/92;G11B20/02;H03M1/10;H04N5/16;H04N5/919;H04N5/922;H04N5/931 主分类号 H04N5/92
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