PULSE GENERATING CIRCUIT AND PLL FREQUENCY SYNTHESIZER

摘要

PURPOSE:To easily produce the control signal of a switching circuit and to change the control signal in accordance with the time constant of a low pass filter for a pulse generating circuit and a PLL frequency synthesizer. CONSTITUTION:A shift register 11 uses the inverted signal IO of a channel switching signal LE as the data and shifts successively these data to the flip-flop 12A1-12An based on the crystal reference frequency CK. Then the register 11 outputs the inverted output signal bars Q to the NAND circuits 15A1-15An. A pulse width setting control circuit 17 outputs the output control signals RC 1-RCn to the circuits 15A1-15An based on a control signal PW1. A multi-input NAND circuit 16 outputs a switching control signal BS1 which is set at an L level when the output signal IO of an inverter 14 and the output signals NO1-NOn of the circuits 15A1-15An are all set at H levels and otherwise set at an H level respectively to an analog switch 8.