发明名称 COMPRESSION PATTERN FORMING APPARATUS
摘要 PURPOSE:To reduce the number of memory test patterns to a large extent and to conserve a simulation time and the capacity of a pattern memory. CONSTITUTION:A pattern forming indication means 2 indicates data necessary for the formation of a pattern such as the data related to an address wire, a data wire and a control signal wire, the data related to a control signal and clock to a control signal and clock operation or the like to input them to a plurality of memories. A pattern compression means 3 performs the indication input to the memories so that the indicated signal wires can be tested at the same time without contradiction. An indication analyzing means 4 analyzes the contents indicated and inputted by the pattern forming indication means 2 and the compression indication means 3 to output pattern forming data and pattern compression data. A pattern forming means 7 receives the input of the logical circuit data 1 of an LSI wherein a plurality of memories are present to form a test pattern 8 capable of simultaneously testing the respective memories in the same pattern based on the pattern forming data and the pattern compression data.
申请公布号 JPH04315069(A) 申请公布日期 1992.11.06
申请号 JP19910079489 申请日期 1991.04.12
申请人 NEC CORP 发明人 SAGA KOJI
分类号 G01R31/3183;G01R31/28;G06F11/22;G06F17/50;G11C29/00;G11C29/10 主分类号 G01R31/3183
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