| 摘要 |
<p>Amplifier containing a first and a second differential pair of input transistors (T1, T2), (T3, T4), the bases of the counterpart transistors of each pair being connected together and at least part of the collector current of the transistors of the second pair (T3, T4) is used in (algebraic) summation mode together with the collector current of the transistors of the first pair (T1, T2) to enhance the linearity of the output signal (V5-V6) from the amplifier.
<??>The amplifier furthermore contains a pair of cascode transistors (T5, T6) connected as collector load of the transistors of the first pair of transistors (T1, T2), whilst the abovementioned summation is carried out by means of resistive bridges (R3, R5), (R4, R6) connected from a supply voltage V'cc to each of the collectors of the transistors of the first pair (T1, T2), whilst the intermediate point (U, V) of these resistive bridges is connected respectively to the collector of the transistors of the second pair (T3, T4).
<??>Amplifiers with extended range of linearity of the output signal.
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