发明名称 Output buffer circuit.
摘要 An output buffer circuit includes a first output buffer (1) having a high output resistance determined by DC specifications, a second output buffer (2) having an output resistance satisfying AC specifications when simultaneously driven with the first output buffer (1), and a control circuit (3) for controlling an operation of the second output buffer (2). An input signal is supplied to the input node of the first output buffer (1), and the output node of the first output buffer (1) is connected to an output terminal (OUT). The output node of the second output buffer (2) is connected to the output terminal (OUT). The control circuit (3) is responsive to the potential of the input signal or of the output terminal (OUT) to control the operation of the second output buffer (2). The control circuit (3) drives the second output buffer (2) when the output from the first output buffer (1) is changed, and sets the output from the second output buffer (2) in the high impedance state when the output from the first output buffer (1) is stationary. <IMAGE>
申请公布号 EP0511643(A1) 申请公布日期 1992.11.04
申请号 EP19920107293 申请日期 1992.04.29
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 SHIGEHARA, HIROSHI;KINUGASA, MASANORI
分类号 H03K17/16;H03K17/687;H03K19/003;H03K19/0175 主分类号 H03K17/16
代理机构 代理人
主权项
地址