发明名称 Buffered address stack register with parallel input registers and overflow protection
摘要 A last-in, first-out register having multiple address input ports and capable of storing a plurality of addresses. Address loading operations are over-lapped with address reading operations to speed up the rate at which addresses may be stored in and retrieved from the register. When the register is full of addresses it provides an indication which permits: the addresses already stored in the register to be read out and stored in an external memory, then additional addresses to be stored in the register, and subsequently the addresses transferred to the memory for storage to be retransferred to the buffer address register for read out.
申请公布号 US5161217(A) 申请公布日期 1992.11.03
申请号 US19890418084 申请日期 1989.10.06
申请人 BULL HN INFORMATION SYSTEMS INC. 发明人 LEMAY, RICHARD A.;TAGUE, STEVEN A.;IZBICKI, KENNETH J.;WOODS, WILLIAM E.
分类号 G06F7/78 主分类号 G06F7/78
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