发明名称 Pipelined cryptography processor and method for its use in communication networks
摘要 Cryptographic apparatus, and a related method for its operation, for in-line encryption and decryption of data packets transmitted in a communication network. A full-duplex cryptographic processor is positioned between two in-line processing entities of a network architecture. For example, in a fiber distributed data interface (FDDI) network, the processor is positioned between a media access control (MAC) sublayer and a ring memory controller (RMC). Incoming information packets are analyzed to decide whether or not they contain encrypted data and, if they do, are subject to decryption before forwarding. Outbound information packets have their data portions encrypted if called for, and are usually forwarded toward the network communication medium. Cryptographic processing in both directions is performed in real time as each packet is streamed through the processor. The processing of outbound information packets includes using optional data paths for looping of the processed information back in a reverse direction, to permit the host system to perform local encryption or decryption for various purposes.
申请公布号 US5161193(A) 申请公布日期 1992.11.03
申请号 US19900546632 申请日期 1990.06.29
申请人 DIGITAL EQUIPMENT CORPORATION 发明人 LAMPSON, BUTLER W.;HAWE, WILLIAM R.;GUPTA, AMAR;SPINNEY, BARRY A.
分类号 H04L29/02 主分类号 H04L29/02
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