发明名称 |
SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE |
摘要 |
PURPOSE:To prevent degradation of the electric characteristics of transistors arranged on the periphery of a memory array (or a memory mat) formed on a semiconductor chip. CONSTITUTION:The inner configuration of a guard ring G arranged on the periphery of a memory mat MM is made substantially equal to the configuration of a diffusion layer 4a on the periphery of the memory mat MM. Also, on this guard ring G, a dummy pattern 8 is provided. The inner configuration of this dummy 8 is made substantially equal to the configuration of a gate electrode 7 arranged on the diffusion layer 4a on the periphery of the memory mat MM. |
申请公布号 |
JPH04307969(A) |
申请公布日期 |
1992.10.30 |
申请号 |
JP19910072748 |
申请日期 |
1991.04.05 |
申请人 |
HITACHI LTD;HITACHI VLSI ENG CORP |
发明人 |
YAMAZAKI YASUSHI;MORIWAKI NOBUYUKI;IKEDA SHUJI;NAKAMURA HIDEAKI;HONJO SHIGERU |
分类号 |
H01L27/11;H01L21/8244 |
主分类号 |
H01L27/11 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|