发明名称 PATTERN ALIGNING METHOD AND MANUFACTURE OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE USING THIS METHOD
摘要 PURPOSE:To improve accuracy in alignment by having two kinds of alignment marks, consisting of a step alignment mark, with which sufficient detection signal intensity can be obtained, and another step alignment mark which is formed by the reference process to be matched, as alignment information. CONSTITUTION:An S-process, with which a detectable alignment mark can be formed in a highly precise manner, is introduced. It is desirable that a low stepping, with which the film thickness of a resist will be made uniform, is formed in the S-process. Based on the detection of the alignment mark of low stepping formed in the S-process, a highly precise alignment can be obtained by conducting an alignment operation in A-F processes. At this point, not only the alignment mark is detected for the S-process, but also the alignment mark for the reference process to be alignment, which is the A-process, is detected, and an accurate alignment is conducted by correcting the offset amount between S and A processes for every wafer based on the result of both alignment marks.
申请公布号 JPH04306819(A) 申请公布日期 1992.10.29
申请号 JP19910070224 申请日期 1991.04.03
申请人 HITACHI LTD 发明人 KUNIYOSHI SHINJI;NOZAKI KATSUHIRO;KATO TAKESHI
分类号 G03F9/00;H01L21/027;H01L21/30 主分类号 G03F9/00
代理机构 代理人
主权项
地址