发明名称 DATA PROCESSOR AND DATA PROCESSING METHOD
摘要 <p>In a parallel data processing system in which processor elements (PE) are arranged in a two-dimensional grid form, each PE includes 1-bit arithmetic means for 1-bit operand data, storage means for storing operand data and/or the result, and communication means for effecting communication with other PEs. A common bus for connecting PEs in a transverse (row) direction is disposed for each PE in a longitudinal (column) direction, or data transfer routes for connecting PEs in the transverse (row) direction are disposed, so as to effect communication between PEs of different columns. The PE in the longitudinal (column) direction is used for 1-word storage and 1-word operation, for example, and parallel operation is effected for each PE of each column. The present invention provides such a parallel data processor and parallel data processing method.</p>
申请公布号 WO1992018935(P1) 申请公布日期 1992.10.29
申请号 JP1992000447 申请日期 1992.04.09
申请人 发明人
分类号 主分类号
代理机构 代理人
主权项
地址
您可能感兴趣的专利