发明名称 Image coding apparatus.
摘要 <p>An image coding apparatus for sequentially coding an input image signal that is supplied at a predetermined frame rate by a rate independent of such a frame rate, thereby obtaining a coding image signal for transmission from which frames are thinned out comprises: a frame memory (110, 204) having a recording area corresponding to one frame of the input image signal to store the input image signal; a write address generator (32) to sequentially generate write addresses in the frame memory in correspondence to the input image signal; a coder (6) to execute a coding process by using the signal which is read out from the frame memory; a read address generator (31) to sequentially generate read addresses in the frame memory in response to a frame change request which is generated from the coder; and write limiting means (50, 51, 58) for comparing the write address and the read address, for stopping the subsequent writing operation of the frames written in the frame memory when the write address approaches the read address, and for restarting the writing operation from the head of the next frame. <IMAGE></p>
申请公布号 EP0510640(A2) 申请公布日期 1992.10.28
申请号 EP19920106946 申请日期 1992.04.23
申请人 HITACHI, LTD. 发明人 KIMURA, JUN-ICHI;TAKIZAWA, MASAAKI
分类号 H04N5/92;G06T9/00;H04N5/907;H04N11/04;H04N19/00;H04N19/42;H04N19/423;H04N19/426;H04N19/44;H04N19/503;H04N19/80;H04N19/85 主分类号 H04N5/92
代理机构 代理人
主权项
地址