发明名称 TEST-PATTERN GENERATOR FOR TESTING EMBEDDED ARRAY
摘要 PURPOSE: To obtain an apparatus for testing embedded array by providing an integrated circuit having the array, a level dependency scan designing(LSSD) circuit for inputting and outputting test data, and a command drive generator for forming a binary pattern. CONSTITUTION: An LSSD shift register chain 410 in a device(DUT) 500 to be tested is attached to a driven array 400 or shift register chain 410 as an output, and served by an LSSD array pattern generator(APG) 430. The arrays serve suitable LSSD APG and its input and output, and can simultaneously test it by the LSSD chain in 400A or independent LSSD input and output shift register chain in 400B. In the case of the single LSSD chain serving both the input and output of the embedded array 400A, the arrays request the use of common input/output to provide the read output from the binary data for the array and the array having the same circuit.
申请公布号 JPH04303777(A) 申请公布日期 1992.10.27
申请号 JP19910353174 申请日期 1991.12.18
申请人 INTERNATL BUSINESS MACH CORP <IBM> 发明人 ARUGIDASU JIYOSEFU GURAUDEISU
分类号 G01R31/3183;G01R31/3181;G01R31/319;G11C29/02;G11C29/10;G11C29/56 主分类号 G01R31/3183
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