Brownout and power-up reset signal generator

摘要

A brownout reset generator includes a presettable counter and a reset controller consisting of a plurality of logic gates coupled to receive a brownout signal representing a power brownout condition or power assertion (i.e. power-up) and a clock signal, and to generate a brownout reset in response to and of selectively longer duration than the brownout signal. Following the leading edge of the brownout signal (i.e. initiation of the brownout condition), the counter is preset to a selected value and remains preset for the duration of the brownout signal. Following the trailing edge of the brownout signal (i.e. termination of the brownout condition), the counter begins counting clock pulses. The counter outputs a timing pulse after a selected number of clock pulses representing a predetermined time interval have been counted. The reset generator provides a brownout reset having a leading edge following and corresponding to the leading edge of the brownout signal and a trailing edge following and corresponding to the leading edge of the timing pulse. Thus, the brownout reset causes its user circuit (e.g. microprocessor) to remain in a brownout reset mode until after the predetermined time interval has passed following termination of the brownout condition. This allows sufficient time for the user circuit's operating parameters to stabilize (e.g. crystal clock signal) or initialize (e.g. internal registers and address pointers) properly prior to resuming operation following termination of the brownout condition.