发明名称 CIRCUIT TO MAKE TEST EASIER
摘要 PURPOSE:To reduce the number of signals connected to an operation verifying circuit. CONSTITUTION:The operating results of a function circuit 9 are output as operating result outputs 8, and the operating results are verified whether they are correct or not by an operation verifying circuit 5. AND circuits 1 and 3, and NOR circuits 2 and 4 which are logical circuits are circuits unable to be verified sufficiently whether the operation is correct or not by only verifying the operation result outputs 8, and these logical circuits have a low frequency to make the output '1'. As a result, the outputs of these four logical circuits are added to the input end of an OR circuit 6, the logical sum is picked up from the signal line being the output end of the OR circuit 6, and it is verified by the operation verifying circuit 5. Even in such a way, a sufficient verifying is secured.
申请公布号 JPH04301782(A) 申请公布日期 1992.10.26
申请号 JP19910089066 申请日期 1991.03.29
申请人 NEC ENG LTD 发明人 MATSUNO SHUNJI
分类号 G01R31/28;G06F11/22 主分类号 G01R31/28
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