发明名称 DATA LATCH WITH BIT OPERATION
摘要 PURPOSE:To operate the only necessary single bit or plural bits at the same time without influencing the output of other bit by the input/output control device which outputs plural bit data from the output terminal for plural bit to outside and performs the latch control. CONSTITUTION:Regarding an output terminal A, for instance, of output terminals A-H for plural bits, a corresponding data selector 16 selects the output of a flip-flop(F/F) 14 at the time of a bit D8='0' of the bit selection instruction data from CPU 10 and the signal level for the output terminal A remains unchanged. At the time of D8='1', D0 bit of the output data from CPU 10 is selected and the value of D0 is outputted in the output terminal A as an input end D of F/F 14 becomes data D0 outputted from CPU 10. When the value of the output terminal for plural bits is changed, the value of bit in the bit selection instruction data is set so that the corresponding selector 16 may select the data outputted from CPU 10.
申请公布号 JPH04299480(A) 申请公布日期 1992.10.22
申请号 JP19910085900 申请日期 1991.03.27
申请人 CASIO ELECTRON MFG CO LTD;CASIO COMPUT CO LTD 发明人 KOJIMA ATSUSHI;ONO KYOICHI
分类号 G06F7/00;G06F7/76;G06F13/12;G06F15/78 主分类号 G06F7/00
代理机构 代理人
主权项
地址